Let the inputs be A and B. The circuit is composed of NOR gates.
A NOR gate with its inputs tied together acts as a NOT gate.
The output of the first NOR gate (input A) is Y1=A+A=Aˉ.
The output of the second NOR gate (input B) is Y2=B+B=Bˉ.
These outputs are fed into a third NOR gate. Its output is Y3=Y1+Y2=Aˉ+Bˉ.
Using De Morgan's theorem, Y3=(Aˉ)⋅(Bˉ)=A⋅B.
This output Y3 is the input to the fourth NOR gate, which is configured as a NOT gate.
The final output is Yout=Y3=A⋅B.
The expression A⋅B represents a NAND gate.