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Truth table of AND gate for output y1
| A | B | y1 |
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
| B | C | y2 |
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
| y1 | y2 | y |
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
For the given circuit, the input digital signals are applied at the terminals A,B and C. What would be the output at the terminal y ?
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Held on 30 Apr 2021 · Verified 9 Jul 2026.
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